I am a Ph.D student from Yale University, New Haven, in my fifth year. I am part of the Yale Systems ARCHitecture group, where we study computer systems for platforms ranging from data center servers to implantable brain computer interfaces.
I am interested in enabling accelerator driven systems. Accelerator design is used to alleviate the end of Dennard scaling and achieve performant and power efficient design. However, it is challenging to use accelerators to their fullest potential with the entire system – using multiple accelerators and integrating them with higher layers of the stack is an unexplored problem encountered when designing accelerators for a real system.
My Ph.D. explores the co-design of accelerators with storage and network in the domain of Brain-Computer Interfaces, a system in great need of power efficient computing. I explore the design of accelerators in two ways. First, I explore classical ASIC design techniques and use them to integrate them with storage and network and allow scalable distributed systems that can be programmed with ease. Second, I explore emerging neuromorphic techniques inspired by the brain to enable low power online learning. Both have allowed me expertise in a wide array of systems design – architecture, distributed systems, neuromorphic systems, and neuro-engineering.
I completed my undergraduate from Rutgers University - Camden in 2018. Before that, I originally began my undergraduate study at Sardar Patel Institute of Technology in Mumbai, where I have lived most of life.
You can contact me using my current email ID: email@example.com. My previous email IDs should also forward to this.